gnu: Add linux-libre-loongson2f.

* gnu/packages/linux-libre-loongson2f.conf, gnu/packages/patches/linux-libre-export-loongson-chipcfg.patch, gnu/packages/patches/linux-libre-gdium.patch, gnu/packages/patches/linux-libre-loongson2-cpufreq-fix.patch, gnu/packages/patches/linux-libre-loongson2-math-emu.patch, gnu/packages/patches/linux-libre-loongson2-max-physmem-bits.patch, gnu/packages/patches/linux-libre-mips-ftrace-fix.patch, gnu/packages/patches/linux-libre-mips-hugetlb-fix.patch, gnu/packages/patches/linux-libre-mips-math-emu-fix-pt1.patch, gnu/packages/patches/linux-libre-mips-math-emu-fix-pt2.patch, gnu/packages/patches/linux-libre-yeeloong-rfkill-key-fix.patch, gnu/packages/patches/linux-libre-yeeloong-silence-ec-messages.patch, gnu/packages/patches/linux-libre-yeeloong.patch: New files. * gnu/local.mk (dist_patch_DATA): Add patches. * Makefile.am (KCONFIGS): Add linux-libre-loongson2f.conf. * gnu/packages/linux.scm (linux-libre-loongson2f): New variable.
2025-01-31 06:46:50 +01:00 · 2015-08-06 17:51:27 -04:00 · 2015-08-06 17:51:27 -04:00 · abfe2e29c8
commit abfe2e29c8
parent 69aa6e0995
16 changed files with 9761 additions and 1 deletions
--- a/Makefile.am
+++ b/Makefile.am
@ -176,7 +176,8 @@ KCONFIGS =					\
  gnu/packages/linux-libre-4.4-i686.conf	\
  gnu/packages/linux-libre-4.4-x86_64.conf	\
  gnu/packages/linux-libre-4.1-i686.conf	\
-  gnu/packages/linux-libre-4.1-x86_64.conf
+  gnu/packages/linux-libre-4.1-x86_64.conf	\
+  gnu/packages/linux-libre-loongson2f.conf

 # Templates, examples.
 EXAMPLES =					\
--- a/gnu/local.mk
+++ b/gnu/local.mk
@ -644,6 +644,18 @@ dist_patch_DATA =						\
  %D%/packages/patches/libwmf-CVE-2015-4695.patch		\
  %D%/packages/patches/libwmf-CVE-2015-4696.patch		\
  %D%/packages/patches/libxslt-generated-ids.patch		\
+  %D%/packages/patches/linux-libre-export-loongson-chipcfg.patch \
+  %D%/packages/patches/linux-libre-gdium.patch			\
+  %D%/packages/patches/linux-libre-loongson2-cpufreq-fix.patch	\
+  %D%/packages/patches/linux-libre-loongson2-math-emu.patch	\
+  %D%/packages/patches/linux-libre-loongson2-max-physmem-bits.patch \
+  %D%/packages/patches/linux-libre-mips-ftrace-fix.patch	\
+  %D%/packages/patches/linux-libre-mips-hugetlb-fix.patch	\
+  %D%/packages/patches/linux-libre-mips-math-emu-fix-pt1.patch	\
+  %D%/packages/patches/linux-libre-mips-math-emu-fix-pt2.patch	\
+  %D%/packages/patches/linux-libre-yeeloong-rfkill-key-fix.patch \
+  %D%/packages/patches/linux-libre-yeeloong-silence-ec-messages.patch \
+  %D%/packages/patches/linux-libre-yeeloong.patch		\
  %D%/packages/patches/lirc-localstatedir.patch			\
  %D%/packages/patches/lm-sensors-hwmon-attrs.patch		\
  %D%/packages/patches/lua-CVE-2014-5461.patch                      \
--- a/gnu/packages/linux-libre-loongson2f.conf
+++ b/gnu/packages/linux-libre-loongson2f.conf
--- a/gnu/packages/linux.scm
+++ b/gnu/packages/linux.scm
@ -372,6 +372,32 @@ (define-public linux-libre-4.1
       `(,@(alist-delete "kconfig" (package-native-inputs linux-libre))
         ("kconfig" ,conf))))))

+(define-public linux-libre-loongson2f
+  (package (inherit linux-libre-4.1)
+    (name "linux-libre-loongson2f")
+    (source (origin
+              (inherit (package-source linux-libre-4.1))
+              (patches
+               (map search-patch
+                    '("linux-libre-mips-hugetlb-fix.patch"
+                      "linux-libre-mips-ftrace-fix.patch"
+                      "linux-libre-mips-math-emu-fix-pt1.patch"
+                      "linux-libre-mips-math-emu-fix-pt2.patch"
+                      "linux-libre-loongson2-math-emu.patch"
+                      "linux-libre-loongson2-cpufreq-fix.patch"
+                      "linux-libre-loongson2-max-physmem-bits.patch"
+                      "linux-libre-export-loongson-chipcfg.patch"
+                      "linux-libre-yeeloong.patch"
+                      "linux-libre-yeeloong-rfkill-key-fix.patch"
+                      "linux-libre-yeeloong-silence-ec-messages.patch"
+                      "linux-libre-gdium.patch")))))
+    (supported-systems '("mips64el-linux"))
+    (native-inputs
+     (let ((conf (search-path %load-path
+                              "gnu/packages/linux-libre-loongson2f.conf")))
+       `(,@(alist-delete "kconfig" (package-native-inputs linux-libre-4.1))
+         ("kconfig" ,conf))))))
+

 ;;;
 ;;; Pluggable authentication modules (PAM).
--- a/gnu/packages/patches/linux-libre-export-loongson-chipcfg.patch
+++ b/gnu/packages/patches/linux-libre-export-loongson-chipcfg.patch
@ -0,0 +1,28 @@
+From: Alexandre Oliva <lxoliva@fsfla.org>
+Date: Thu, 6 Aug 2015 01:54:21 -0400
+Subject: [PATCH 6/9] Loongson: export loongson_chipcfg
+
+Building drivers/cpufreq/loongson_cpufreq as a module would fail
+because loongson_chipcfg wasn't exported in
+arch/mips/loongson/common/env.c.  Fixed.
+
+Signed-off-by: Alexandre Oliva <lxoliva@fsfla.org>
+---
+ arch/mips/loongson64/common/env.c | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/arch/mips/loongson/common/env.c b/arch/mips/loongson/common/env.c
+index 22f04ca..fc454f2 100644
+--- a/arch/mips/loongson/common/env.c
+++ b/arch/mips/loongson/common/env.c
+@@ -29,6 +29,7 @@ struct efi_memory_map_loongson *loongson_memmap;
+ struct loongson_system_configuration loongson_sysconf;
+ 
+ u64 loongson_chipcfg[MAX_PACKAGES] = {0xffffffffbfc00180};
+EXPORT_SYMBOL_GPL(loongson_chipcfg);
+ u64 loongson_chiptemp[MAX_PACKAGES];
+ u64 loongson_freqctrl[MAX_PACKAGES];
+ 
+-- 
+2.4.3
+
--- a/gnu/packages/patches/linux-libre-gdium.patch
+++ b/gnu/packages/patches/linux-libre-gdium.patch
--- a/gnu/packages/patches/linux-libre-loongson2-cpufreq-fix.patch
+++ b/gnu/packages/patches/linux-libre-loongson2-cpufreq-fix.patch
@ -0,0 +1,59 @@
+From acda4b2b30a1dbb61e5600bc787a98b705564d7a Mon Sep 17 00:00:00 2001
+From: Alexandre Oliva <lxoliva@fsfla.org>
+Date: Fri, 22 Aug 2014 19:11:21 -0300
+Subject: [PATCH 4/9] loongson2 cpufreq: unregister on init failure
+
+If the loongson2_cpufreq module fails to init, e.g. because
+any of the cpufreq_register functions fail, it must unregister
+so that the module is unloaded successfully and no misinitialized
+device remains in the udev device list.  Fixed.
+
+Signed-off-by: Alexandre Oliva <lxoliva@fsfla.org>
+---
+ drivers/cpufreq/loongson2_cpufreq.c | 20 ++++++++++++++++----
+ 1 file changed, 16 insertions(+), 4 deletions(-)
+
+diff --git a/drivers/cpufreq/loongson2_cpufreq.c b/drivers/cpufreq/loongson2_cpufreq.c
+index fc897ba..ac60f6b 100644
+--- a/drivers/cpufreq/loongson2_cpufreq.c
+++ b/drivers/cpufreq/loongson2_cpufreq.c
+@@ -161,20 +161,32 @@ static int __init cpufreq_init(void)
+ 	/* Register platform stuff */
+ 	ret = platform_driver_register(&platform_driver);
+ 	if (ret)
+-		return ret;
+		goto err_return;
+ 
+ 	pr_info("cpufreq: Loongson-2F CPU frequency driver.\n");
+ 
+-	cpufreq_register_notifier(&loongson2_cpufreq_notifier_block,
+-				  CPUFREQ_TRANSITION_NOTIFIER);
+	ret = cpufreq_register_notifier(&loongson2_cpufreq_notifier_block,
+					CPUFREQ_TRANSITION_NOTIFIER);
+	if (ret)
+		goto err_platform_driver_unregister;
+ 
+ 	ret = cpufreq_register_driver(&loongson2_cpufreq_driver);
+	if (ret)
+		goto err_cpufreq_unregister_notifier;
+ 
+-	if (!ret && !nowait) {
+	if (!nowait) {
+ 		saved_cpu_wait = cpu_wait;
+ 		cpu_wait = loongson2_cpu_wait;
+ 	}
+ 
+	return 0;
+
+ err_cpufreq_unregister_notifier:
+	cpufreq_unregister_notifier(&loongson2_cpufreq_notifier_block,
+				    CPUFREQ_TRANSITION_NOTIFIER);
+ err_platform_driver_unregister:
+	platform_driver_unregister(&platform_driver);
+ err_return:
+ 	return ret;
+ }
+ 
+-- 
+2.4.3
+
--- a/gnu/packages/patches/linux-libre-loongson2-math-emu.patch
+++ b/gnu/packages/patches/linux-libre-loongson2-math-emu.patch
@ -0,0 +1,386 @@
+From fd6faa493baa986e43d011f7bc84c3fe3b811b2b Mon Sep 17 00:00:00 2001
+From: Mark H Weaver <mhw@netris.org>
+Date: Thu, 6 Aug 2015 01:28:10 -0400
+Subject: [PATCH 3/9] Support Loongson2f floating-point instructions in
+ mips/math-emu.
+
+* (arch/mips/include/asm/inst.h): Add Loongson2f function field values
+  for madd/msub/nmadd/nmsub that use the spec2 opcode, and the
+  Loongson2f/MIPS-5 format field value for paired-single
+  floating-point operations.
+
+* (arch/mips/math-emu/cp1emu.c): Add support for the Loongson2f
+  instructions for madd/msub/nmadd/nmsub, which use the spec2 opcode.
+  Also add support for the Loongson2f instructions that use the
+  paired-single floating-point format.
+---
+ arch/mips/include/uapi/asm/inst.h |   4 +-
+ arch/mips/math-emu/cp1emu.c       | 281 +++++++++++++++++++++++++++++++++++++-
+ 2 files changed, 283 insertions(+), 2 deletions(-)
+
+diff --git a/arch/mips/include/uapi/asm/inst.h b/arch/mips/include/uapi/asm/inst.h
+index 9b6ccbd..99e6430 100644
+--- a/arch/mips/include/uapi/asm/inst.h
+++ b/arch/mips/include/uapi/asm/inst.h
+@@ -65,6 +65,8 @@ enum spec_op {
+ enum spec2_op {
+ 	madd_op, maddu_op, mul_op, spec2_3_unused_op,
+ 	msub_op, msubu_op, /* more unused ops */
+	loongson_madd_op = 0x18, loongson_msub_op,
+	loongson_nmadd_op, loongson_nmsub_op,
+ 	clz_op = 0x20, clo_op,
+ 	dclz_op = 0x24, dclo_op,
+ 	sdbpp_op = 0x3f
+@@ -151,7 +153,7 @@ enum cop0_com_func {
+  */
+ enum cop1_fmt {
+ 	s_fmt, d_fmt, e_fmt, q_fmt,
+-	w_fmt, l_fmt
+	w_fmt, l_fmt, ps_fmt
+ };
+ 
+ /*
+diff --git a/arch/mips/math-emu/cp1emu.c b/arch/mips/math-emu/cp1emu.c
+index ed82f0e..86ec4f2 100644
+--- a/arch/mips/math-emu/cp1emu.c
+++ b/arch/mips/math-emu/cp1emu.c
+@@ -7,6 +7,9 @@
+  * Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com
+  * Copyright (C) 2000  MIPS Technologies, Inc.
+  *
+ * Loongson instruction support
+ * Copyright (C) 2011  Mark H Weaver <mhw@netris.org>
+ *
+  *  This program is free software; you can distribute it and/or modify it
+  *  under the terms of the GNU General Public License (Version 2) as
+  *  published by the Free Software Foundation.
+@@ -61,6 +64,11 @@ static int fpu_emu(struct pt_regs *, struct mips_fpu_struct *,
+ static int fpux_emu(struct pt_regs *,
+ 	struct mips_fpu_struct *, mips_instruction, void *__user *);
+ 
+#ifdef CONFIG_MACH_LOONGSON
+static int loongson_spec2_emu(struct pt_regs *,
+	struct mips_fpu_struct *, mips_instruction, void *__user *);
+#endif
+
+ /* Control registers */
+ 
+ #define FPCREG_RID	0	/* $0  = revision id */
+@@ -843,6 +851,14 @@ do {									\
+ #define DPFROMREG(dp, x)	DIFROMREG((dp).bits, x)
+ #define DPTOREG(dp, x)	DITOREG((dp).bits, x)
+ 
+/* Support for Loongson paired single floating-point format */
+#define PSIFROMREG(si1, si2, x) ({ u64 di; DIFROMREG(di, x);		\
+			(si1) = (u32)di; (si2) = (u32)(di >> 32); })
+#define PSITOREG(si1, si2, x) DITOREG((si1) | ((u64)(si2) << 32), x)
+
+#define PSPFROMREG(sp1, sp2, x) PSIFROMREG((sp1).bits, (sp2).bits, x)
+#define PSPTOREG(sp1, sp2, x)	PSITOREG((sp1).bits, (sp2).bits, x)
+
+ /*
+  * Emulate a CFC1 instruction.
+  */
+@@ -1367,6 +1383,16 @@ emul:
+ 			xcp->regs[MIPSInst_RD(ir)] =
+ 				xcp->regs[MIPSInst_RS(ir)];
+ 		break;
+
+#ifdef CONFIG_MACH_LOONGSON
+	case spec2_op:{
+		int sig = loongson_spec2_emu(xcp, ctx, ir, fault_addr);
+		if (sig)
+			return sig;
+		break;
+	}
+#endif
+
+ 	default:
+ sigill:
+ 		return SIGILL;
+@@ -1444,6 +1470,172 @@ DEF3OP(msub, dp, ieee754dp_mul, ieee754dp_sub, );
+ DEF3OP(nmadd, dp, ieee754dp_mul, ieee754dp_add, ieee754dp_neg);
+ DEF3OP(nmsub, dp, ieee754dp_mul, ieee754dp_sub, ieee754dp_neg);
+ 
+#ifdef CONFIG_MACH_LOONGSON
+static int loongson_spec2_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
+	mips_instruction ir, void *__user *fault_addr)
+{
+	int rfmt;		/* resulting format */
+	unsigned rcsr = 0;	/* resulting csr */
+	union {
+		union ieee754dp d;
+		struct {
+			union ieee754sp s;
+			union ieee754sp s2;
+		};
+	} rv;			/* resulting value */
+
+	/* XXX maybe add a counter for loongson spec2 fp instructions? */
+	/* MIPS_FPU_EMU_INC_STATS(cp1xops); */
+
+	switch (rfmt = (MIPSInst_FFMT(ir) & 0xf)) {
+	case s_fmt:{
+		union ieee754sp(*handler) (union ieee754sp, union ieee754sp, union ieee754sp);
+		union ieee754sp fd, fs, ft;
+
+		switch (MIPSInst_FUNC(ir)) {
+		case loongson_madd_op:
+			handler = fpemu_sp_madd;
+			goto scoptop;
+		case loongson_msub_op:
+			handler = fpemu_sp_msub;
+			goto scoptop;
+		case loongson_nmadd_op:
+			handler = fpemu_sp_nmadd;
+			goto scoptop;
+		case loongson_nmsub_op:
+			handler = fpemu_sp_nmsub;
+			goto scoptop;
+
+		      scoptop:
+			SPFROMREG(fd, MIPSInst_FD(ir));
+			SPFROMREG(fs, MIPSInst_FS(ir));
+			SPFROMREG(ft, MIPSInst_FT(ir));
+			rv.s = (*handler) (fd, fs, ft);
+
+		      copcsr:
+			if (ieee754_cxtest(IEEE754_INEXACT))
+				rcsr |= FPU_CSR_INE_X | FPU_CSR_INE_S;
+			if (ieee754_cxtest(IEEE754_UNDERFLOW))
+				rcsr |= FPU_CSR_UDF_X | FPU_CSR_UDF_S;
+			if (ieee754_cxtest(IEEE754_OVERFLOW))
+				rcsr |= FPU_CSR_OVF_X | FPU_CSR_OVF_S;
+			if (ieee754_cxtest(IEEE754_INVALID_OPERATION))
+				rcsr |= FPU_CSR_INV_X | FPU_CSR_INV_S;
+
+			break;
+
+		default:
+			return SIGILL;
+		}
+		break;
+	}
+
+	case d_fmt:{
+		union ieee754dp(*handler) (union ieee754dp, union ieee754dp, union ieee754dp);
+		union ieee754dp fd, fs, ft;
+
+		switch (MIPSInst_FUNC(ir)) {
+		case loongson_madd_op:
+			handler = fpemu_dp_madd;
+			goto dcoptop;
+		case loongson_msub_op:
+			handler = fpemu_dp_msub;
+			goto dcoptop;
+		case loongson_nmadd_op:
+			handler = fpemu_dp_nmadd;
+			goto dcoptop;
+		case loongson_nmsub_op:
+			handler = fpemu_dp_nmsub;
+			goto dcoptop;
+
+		      dcoptop:
+			DPFROMREG(fd, MIPSInst_FD(ir));
+			DPFROMREG(fs, MIPSInst_FS(ir));
+			DPFROMREG(ft, MIPSInst_FT(ir));
+			rv.d = (*handler) (fd, fs, ft);
+			goto copcsr;
+
+		default:
+			return SIGILL;
+		}
+		break;
+	}
+
+	case ps_fmt:{
+		union ieee754sp(*handler) (union ieee754sp, union ieee754sp, union ieee754sp);
+		struct _ieee754_csr ieee754_csr_save;
+		union ieee754sp fd1, fs1, ft1;
+		union ieee754sp fd2, fs2, ft2;
+
+		switch (MIPSInst_FUNC(ir)) {
+		case loongson_madd_op:
+			handler = fpemu_sp_madd;
+			goto pscoptop;
+		case loongson_msub_op:
+			handler = fpemu_sp_msub;
+			goto pscoptop;
+		case loongson_nmadd_op:
+			handler = fpemu_sp_nmadd;
+			goto pscoptop;
+		case loongson_nmsub_op:
+			handler = fpemu_sp_nmsub;
+			goto pscoptop;
+
+		      pscoptop:
+			PSPFROMREG(fd1, fd2, MIPSInst_FD(ir));
+			PSPFROMREG(fs1, fs2, MIPSInst_FS(ir));
+			PSPFROMREG(ft1, ft2, MIPSInst_FT(ir));
+			rv.s = (*handler) (fd1, fs1, ft1);
+			ieee754_csr_save = ieee754_csr;
+			rv.s2 = (*handler) (fd2, fs2, ft2);
+			ieee754_csr.cx |= ieee754_csr_save.cx;
+			ieee754_csr.sx |= ieee754_csr_save.sx;
+			goto copcsr;
+
+		default:
+			return SIGILL;
+		}
+		break;
+	}
+
+	default:
+		return SIGILL;
+	}
+
+	/*
+	 * Update the fpu CSR register for this operation.
+	 * If an exception is required, generate a tidy SIGFPE exception,
+	 * without updating the result register.
+	 * Note: cause exception bits do not accumulate, they are rewritten
+	 * for each op; only the flag/sticky bits accumulate.
+	 */
+	ctx->fcr31 = (ctx->fcr31 & ~FPU_CSR_ALL_X) | rcsr;
+	if ((ctx->fcr31 >> 5) & ctx->fcr31 & FPU_CSR_ALL_E) {
+		/*printk ("SIGFPE: fpu csr = %08x\n",ctx->fcr31); */
+		return SIGFPE;
+	}
+
+	/*
+	 * Now we can safely write the result back to the register file.
+	 */
+	switch (rfmt) {
+	case d_fmt:
+		DPTOREG(rv.d, MIPSInst_FD(ir));
+		break;
+	case s_fmt:
+		SPTOREG(rv.s, MIPSInst_FD(ir));
+		break;
+	case ps_fmt:
+		PSPTOREG(rv.s, rv.s2, MIPSInst_FD(ir));
+		break;
+	default:
+		return SIGILL;
+	}
+
+	return 0;
+}
+#endif
+
+ static int fpux_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
+ 	mips_instruction ir, void *__user *fault_addr)
+ {
+@@ -1654,7 +1846,12 @@ static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
+ 	unsigned cond;
+ 	union {
+ 		union ieee754dp d;
+-		union ieee754sp s;
+		struct {
+			union ieee754sp s;
+#ifdef CONFIG_MACH_LOONGSON
+			union ieee754sp s2; /* for Loongson paired singles */
+#endif
+		};
+ 		int w;
+ 		s64 l;
+ 	} rv;			/* resulting value */
+@@ -2065,6 +2262,83 @@ dcopuop:
+ 		break;
+ 	}
+ 
+#ifdef CONFIG_MACH_LOONGSON
+	case ps_fmt:{		/* 6 */
+		/* Support for Loongson paired single fp instructions */
+		union {
+			union ieee754sp(*b) (union ieee754sp, union ieee754sp);
+			union ieee754sp(*u) (union ieee754sp);
+		} handler;
+
+		switch (MIPSInst_FUNC(ir)) {
+			/* binary ops */
+		case fadd_op:
+			handler.b = ieee754sp_add;
+			goto pscopbop;
+		case fsub_op:
+			handler.b = ieee754sp_sub;
+			goto pscopbop;
+		case fmul_op:
+			handler.b = ieee754sp_mul;
+			goto pscopbop;
+
+			/* unary  ops */
+		case fabs_op:
+			handler.u = ieee754sp_abs;
+			goto pscopuop;
+		case fneg_op:
+			handler.u = ieee754sp_neg;
+			goto pscopuop;
+		case fmov_op:
+			/* an easy one */
+			PSPFROMREG(rv.s, rv.s2, MIPSInst_FS(ir));
+			break;
+
+		      pscopbop: /* paired binary op handler */
+			{
+				struct _ieee754_csr ieee754_csr_save;
+				union ieee754sp fs1, ft1;
+				union ieee754sp fs2, ft2;
+
+				PSPFROMREG(fs1, fs2, MIPSInst_FS(ir));
+				PSPFROMREG(ft1, ft2, MIPSInst_FT(ir));
+				rv.s  = (*handler.b) (fs1, ft1);
+				ieee754_csr_save = ieee754_csr;
+				rv.s2 = (*handler.b) (fs2, ft2);
+				ieee754_csr.cx |= ieee754_csr_save.cx;
+				ieee754_csr.sx |= ieee754_csr_save.sx;
+				goto copcsr;
+			}
+		      pscopuop: /* paired unary op handler */
+			{
+				struct _ieee754_csr ieee754_csr_save;
+				union ieee754sp fs1;
+				union ieee754sp fs2;
+
+				PSPFROMREG(fs1, fs2, MIPSInst_FS(ir));
+				rv.s  = (*handler.u) (fs1);
+				ieee754_csr_save = ieee754_csr;
+				rv.s2 = (*handler.u) (fs2);
+				ieee754_csr.cx |= ieee754_csr_save.cx;
+				ieee754_csr.sx |= ieee754_csr_save.sx;
+				goto copcsr;
+			}
+			break;
+
+		default:
+			if (MIPSInst_FUNC(ir) >= fcmp_op) {
+				/* Loongson fp hardware handles all
+				   cases of fp compare insns, so we
+				   shouldn't have to */
+				printk ("Loongson paired-single fp compare"
+					" unimplemented in cp1emu.c\n");
+			}
+			return SIGILL;
+		}
+		break;
+	}
+#endif
+
+ 	case l_fmt:
+ 
+ 		if (!cpu_has_mips_3_4_5_64_r2_r6)
+@@ -2136,6 +2410,11 @@ dcopuop:
+ 
+ 		DITOREG(rv.l, MIPSInst_FD(ir));
+ 		break;
+#ifdef CONFIG_MACH_LOONGSON
+	case ps_fmt:
+		PSPTOREG(rv.s, rv.s2, MIPSInst_FD(ir));
+		break;
+#endif
+ 	default:
+ 		return SIGILL;
+ 	}
+-- 
+2.4.3
+
--- a/gnu/packages/patches/linux-libre-loongson2-max-physmem-bits.patch
+++ b/gnu/packages/patches/linux-libre-loongson2-max-physmem-bits.patch
@ -0,0 +1,36 @@
+From 8d7280c9ee3d7de6f129b9c3112faffb20841154 Mon Sep 17 00:00:00 2001
+From: Alexandre Oliva <lxoliva@fsfla.org>
+Date: Wed, 15 Oct 2014 02:00:28 -0300
+Subject: [PATCH 5/9] Loongson2: restore working MAX_PHYSMEM_BITS definition
+
+Commit c461731836 bumped MAX_PHYSMEM_BITS up unconditionally, but
+this causes Loongson2 machines to freeze very early on boot.
+
+To restore Loongson2 to a functional state, I have restored the
+original definition, for Loongson2 only.
+
+Signed-off-by: Alexandre Oliva <oliva@gnu.org>
+---
+ arch/mips/include/asm/sparsemem.h | 6 +++++-
+ 1 file changed, 5 insertions(+), 1 deletion(-)
+
+diff --git a/arch/mips/include/asm/sparsemem.h b/arch/mips/include/asm/sparsemem.h
+index b1071c1..8b8e551 100644
+--- a/arch/mips/include/asm/sparsemem.h
+++ b/arch/mips/include/asm/sparsemem.h
+@@ -11,7 +11,11 @@
+ #else
+ # define SECTION_SIZE_BITS	28
+ #endif
+-#define MAX_PHYSMEM_BITS	48
+#if !defined(CONFIG_MACH_LOONGSON) || !defined(CONFIG_CPU_LOONGSON2)	/* Commit c461731836 broke Loongson2.  */
+# define MAX_PHYSMEM_BITS	48
+#else
+# define MAX_PHYSMEM_BITS	35
+#endif
+ 
+ #endif /* CONFIG_SPARSEMEM */
+ #endif /* _MIPS_SPARSEMEM_H */
+-- 
+2.4.3
+
--- a/gnu/packages/patches/linux-libre-mips-ftrace-fix.patch
+++ b/gnu/packages/patches/linux-libre-mips-ftrace-fix.patch
@ -0,0 +1,85 @@
+From a5b566da301f670302930a0af4a8102a29d27f7f Mon Sep 17 00:00:00 2001
+From: Wu Zhangjin <wuzhangjin@gmail.com>
+Date: Wed, 20 Oct 2010 02:27:26 +0800
+Subject: [PATCH 7/9] MIPS: tracing/ftrace: Fixes mcount_regex for modules
+
+In some situations, the modules may have the same address space as the
+core kernel space, then, it should also match the regular R_MIPS_26
+string.
+
+Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
+---
+ scripts/recordmcount.pl | 46 +++++++++++++++++++++++++++++-----------------
+ 1 file changed, 29 insertions(+), 17 deletions(-)
+
+diff --git a/scripts/recordmcount.pl b/scripts/recordmcount.pl
+index 826470d..9e6dc30 100755
+--- a/scripts/recordmcount.pl
+++ b/scripts/recordmcount.pl
+@@ -310,14 +310,33 @@ if ($arch eq "x86_64") {
+     $cc .= " -m64";
+     $objcopy .= " -O elf64-sparc";
+ } elsif ($arch eq "mips") {
+-    # To enable module support, we need to enable the -mlong-calls option
+-    # of gcc for module, after using this option, we can not get the real
+-    # offset of the calling to _mcount, but the offset of the lui
+-    # instruction or the addiu one. herein, we record the address of the
+-    # first one, and then we can replace this instruction by a branch
+-    # instruction to jump over the profiling function to filter the
+-    # indicated functions, or swith back to the lui instruction to trace
+-    # them, which means dynamic tracing.
+    # <For kernel>
+    # To disable tracing, just replace "jal _mcount" with nop;
+    # to enable tracing, replace back. so, the offset 14 is
+    # needed to be recorded.
+    #
+    #     10:   03e0082d        move    at,ra
+    #	  14:   0c000000        jal     0
+    #                    14: R_MIPS_26   _mcount
+    #                    14: R_MIPS_NONE *ABS*
+    #                    14: R_MIPS_NONE *ABS*
+    #	 18:   00020021        nop
+    #
+    # <For module>
+    #
+    # If no long call(-mlong-calls), the same to kernel.
+    #
+    # If the module space differs from the kernel space, long
+    # call is needed, as a result, the address of _mcount is
+    # needed to be recorded in a register and then jump from
+    # module space to kernel space via "jalr <register>". To
+    # disable tracing, "jalr <register>" can be replaced by
+    # nop; to enable tracing, replace it back. Since the
+    # offset of "jalr <register>" is not easy to be matched,
+    # the offset of the 1st _mcount below is recorded and to
+    # disable tracing, "lui v1, 0x0" is substituted with "b
+    # label", which jumps over "jalr <register>"; to enable
+    # tracing, replace it back.
+     #
+     #       c:	3c030000 	lui	v1,0x0
+     #			c: R_MIPS_HI16	_mcount
+@@ -329,19 +348,12 @@ if ($arch eq "x86_64") {
+     #			10: R_MIPS_NONE	*ABS*
+     #      14:	03e0082d 	move	at,ra
+     #      18:	0060f809 	jalr	v1
+    #                     label:
+     #
+-    # for the kernel:
+-    #
+-    #     10:   03e0082d        move    at,ra
+-    #	  14:   0c000000        jal     0 <loongson_halt>
+-    #                    14: R_MIPS_26   _mcount
+-    #                    14: R_MIPS_NONE *ABS*
+-    #                    14: R_MIPS_NONE *ABS*
+-    #	 18:   00020021        nop
+     if ($is_module eq "0") {
+ 	    $mcount_regex = "^\\s*([0-9a-fA-F]+): R_MIPS_26\\s+_mcount\$";
+     } else {
+-	    $mcount_regex = "^\\s*([0-9a-fA-F]+): R_MIPS_HI16\\s+_mcount\$";
+	    $mcount_regex = "^\\s*([0-9a-fA-F]+): R_MIPS_(HI16|26)\\s+_mcount\$";
+     }
+     $objdump .= " -Melf-trad".$endian."mips ";
+ 
+-- 
+2.4.3
+
--- a/gnu/packages/patches/linux-libre-mips-hugetlb-fix.patch
+++ b/gnu/packages/patches/linux-libre-mips-hugetlb-fix.patch
@ -0,0 +1,15 @@
+Fix Huge TLB support on some MIPS machines including Loongson 2F.
+
+Patch by Mark H Weaver <mhw@netris.org>
+
+--- linux-4.1.6/arch/mips/include/asm/pgtable-bits.h	2015-08-16 23:52:51.000000000 -0400
+++ linux-4.1.6/arch/mips/include/asm/pgtable-bits.h	2015-08-22 16:42:06.589995600 -0400
+@@ -160,7 +160,7 @@
+ #define _PAGE_GLOBAL_SHIFT	(_PAGE_NO_READ_SHIFT + 1)
+ #define _PAGE_GLOBAL		(1 << _PAGE_GLOBAL_SHIFT)
+ 
+-#else	/* !CONFIG_CPU_MIPSR2 && !CONFIG_CPU_MIPSR6 */
+#elif !defined(CONFIG_64BIT) || !defined(CONFIG_MIPS_HUGE_TLB_SUPPORT)
+ #define _PAGE_GLOBAL_SHIFT	(_PAGE_MODIFIED_SHIFT + 1)
+ #define _PAGE_GLOBAL		(1 << _PAGE_GLOBAL_SHIFT)
+ #endif	/* CONFIG_CPU_MIPSR2 || CONFIG_CPU_MIPSR6 */
--- a/gnu/packages/patches/linux-libre-mips-math-emu-fix-pt1.patch
+++ b/gnu/packages/patches/linux-libre-mips-math-emu-fix-pt1.patch
@ -0,0 +1,35 @@
+From 58f2873fbfd3b6734e4affedfcba569e3369f646 Mon Sep 17 00:00:00 2001
+From: Mark H Weaver <mhw@netris.org>
+Date: Thu, 6 Aug 2015 01:22:42 -0400
+Subject: [PATCH 1/9] Don't process empty cause flags after simple fp move on
+ MIPS.
+
+---
+ arch/mips/math-emu/cp1emu.c | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/arch/mips/math-emu/cp1emu.c b/arch/mips/math-emu/cp1emu.c
+index 22b9b2c..139af11 100644
+--- a/arch/mips/math-emu/cp1emu.c
+++ b/arch/mips/math-emu/cp1emu.c
+@@ -1746,7 +1746,7 @@ static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
+ 		case fmov_op:
+ 			/* an easy one */
+ 			SPFROMREG(rv.s, MIPSInst_FS(ir));
+-			goto copcsr;
+			break;
+ 
+ 			/* binary op on handler */
+ scopbop:
+@@ -1943,7 +1943,7 @@ copcsr:
+ 		case fmov_op:
+ 			/* an easy one */
+ 			DPFROMREG(rv.d, MIPSInst_FS(ir));
+-			goto copcsr;
+			break;
+ 
+ 			/* binary op on handler */
+ dcopbop:
+-- 
+2.4.3
+
--- a/gnu/packages/patches/linux-libre-mips-math-emu-fix-pt2.patch
+++ b/gnu/packages/patches/linux-libre-mips-math-emu-fix-pt2.patch
@ -0,0 +1,66 @@
+From 5e207ff6fc01f129a3e0ef6c33b141e4315ac633 Mon Sep 17 00:00:00 2001
+From: Mark H Weaver <mhw@netris.org>
+Date: Thu, 6 Aug 2015 01:25:50 -0400
+Subject: [PATCH 2/9] Fix handling of prefx instruction in mips/math-emu
+
+* Add prefx opcode.
+
+* Recognize the prefx instruction regardless of what bits happen to be
+  in bits 21-25, which is the format field of the floating-point ops,
+  but holds the base register of the prefx instruction.
+---
+ arch/mips/include/uapi/asm/inst.h | 3 ++-
+ arch/mips/math-emu/cp1emu.c       | 9 +++++++--
+ 2 files changed, 9 insertions(+), 3 deletions(-)
+
+diff --git a/arch/mips/include/uapi/asm/inst.h b/arch/mips/include/uapi/asm/inst.h
+index fc0cf5a..9b6ccbd 100644
+--- a/arch/mips/include/uapi/asm/inst.h
+++ b/arch/mips/include/uapi/asm/inst.h
+@@ -180,7 +180,8 @@ enum cop1_sdw_func {
+ enum cop1x_func {
+ 	lwxc1_op     =	0x00, ldxc1_op	   =  0x01,
+ 	swxc1_op     =  0x08, sdxc1_op	   =  0x09,
+-	pfetch_op    =	0x0f, madd_s_op	   =  0x20,
+	pfetch_op    =	0x0f,
+	prefx_op     =  0x17, madd_s_op    =  0x20,
+ 	madd_d_op    =	0x21, madd_e_op	   =  0x22,
+ 	msub_s_op    =	0x28, msub_d_op	   =  0x29,
+ 	msub_e_op    =	0x2a, nmadd_s_op   =  0x30,
+diff --git a/arch/mips/math-emu/cp1emu.c b/arch/mips/math-emu/cp1emu.c
+index 139af11..ed82f0e 100644
+--- a/arch/mips/math-emu/cp1emu.c
+++ b/arch/mips/math-emu/cp1emu.c
+@@ -1545,7 +1545,7 @@ static int fpux_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
+ 			break;
+ 
+ 		default:
+-			return SIGILL;
+			goto SIGILL_unless_prefx_op;
+ 		}
+ 		break;
+ 	}
+@@ -1615,7 +1615,7 @@ static int fpux_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
+ 			goto copcsr;
+ 
+ 		default:
+-			return SIGILL;
+			goto SIGILL_unless_prefx_op;
+ 		}
+ 		break;
+ 	}
+@@ -1628,6 +1628,11 @@ static int fpux_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
+ 		break;
+ 
+ 	default:
+	      SIGILL_unless_prefx_op:
+		if (MIPSInst_FUNC(ir) == prefx_op) {
+			/* ignore prefx operation */
+			break;
+		}
+ 		return SIGILL;
+ 	}
+ 
+-- 
+2.4.3
+
--- a/gnu/packages/patches/linux-libre-yeeloong-rfkill-key-fix.patch
+++ b/gnu/packages/patches/linux-libre-yeeloong-rfkill-key-fix.patch
@ -0,0 +1,48 @@
+From c49e2c1b1dbe95821f8134a48ca747e5161e75a6 Mon Sep 17 00:00:00 2001
+From: Mark H Weaver <mhw@netris.org>
+Date: Sun, 23 Aug 2015 17:06:18 -0400
+Subject: [PATCH] Yeeloong: Ignore the Fn + F5 (rfkill toggle) key combination.
+
+* drivers/platform/mips/yeeloong_laptop.c (yeeloong_keymap): Do not
+  generate a user-visible key press from the Fn + F5 key combination.
+---
+ drivers/platform/mips/yeeloong_laptop.c | 23 ++++++++++++++++++++++-
+ 1 file changed, 22 insertions(+), 1 deletion(-)
+
+diff --git a/drivers/platform/mips/yeeloong_laptop.c b/drivers/platform/mips/yeeloong_laptop.c
+index 9f2d81b..6d7cde6 100644
+--- a/drivers/platform/mips/yeeloong_laptop.c
+++ b/drivers/platform/mips/yeeloong_laptop.c
+@@ -803,7 +803,28 @@ static const struct key_entry yeeloong_keymap[] = {
+ 	{KE_KEY, EVENT_BLACK_SCREEN, { KEY_DISPLAYTOGGLE } }, /* Fn + F2 */
+ 	{KE_KEY, EVENT_DISPLAY_TOGGLE, { KEY_SWITCHVIDEOMODE } }, /* Fn + F3 */
+ 	{KE_KEY, EVENT_AUDIO_MUTE, { KEY_MUTE } }, /* Fn + F4 */
+-	{KE_KEY, EVENT_WLAN, { KEY_WLAN } }, /* Fn + F5 */
+
+	/* XXX Fn + F5 is handled at a lower level (presumably by the
+	   embedded controller) to toggle the state of the hardware
+	   rfkill switch of the internal RTL8187B wireless adapter.
+
+	   If we also map it to KEY_WLAN, as is done by the
+	   loongson-community kernel as of August 2015, that causes
+	   the generic rfkill input subsystem to toggle the state of
+	   the software rfkill switch for all wireless devices.
+
+	   At boot time, these two switch states start out
+	   out-of-sync, so rfkill is always blocked by one or the
+	   other: pressing Fn + F5 merely toggles whether it is the
+	   software or hardware rfkill switch that's causing the
+	   block.  Even if we arranged to start with these two switch
+	   states in sync, they might possibly get out of sync at some
+	   point.  It seems fragile.
+
+	   So, instead, we simply avoid the dual meaning of this key,
+	   by ignoring the key from software. */
+	{KE_IGNORE, EVENT_WLAN, { KEY_WLAN } }, /* Fn + F5 */
+
+ 	{KE_KEY, EVENT_DISPLAY_BRIGHTNESS, { KEY_BRIGHTNESSUP } }, /* Fn + up */
+ 	{KE_KEY, EVENT_DISPLAY_BRIGHTNESS, { KEY_BRIGHTNESSDOWN } }, /* Fn + down */
+ 	{KE_KEY, EVENT_AUDIO_VOLUME, { KEY_VOLUMEUP } }, /* Fn + right */
+-- 
+2.5.0
+
--- a/gnu/packages/patches/linux-libre-yeeloong-silence-ec-messages.patch
+++ b/gnu/packages/patches/linux-libre-yeeloong-silence-ec-messages.patch
@ -0,0 +1,26 @@
+From 2db1cedcf67ef5e1703069bbbdbac8483cd002e1 Mon Sep 17 00:00:00 2001
+From: Mark H Weaver <mhw@netris.org>
+Date: Sat, 5 Sep 2015 23:44:59 -0400
+Subject: [PATCH] yeeloong: Change "ec issued command" from KERN_INFO to
+ KERN_DEBUG.
+
+---
+ arch/mips/loongson64/lemote-2f/ec_kb3310b.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/arch/mips/loongson/lemote-2f/ec_kb3310b.c b/arch/mips/loongson/lemote-2f/ec_kb3310b.c
+index 2b666d3..c5f4b82 100644
+--- a/arch/mips/loongson/lemote-2f/ec_kb3310b.c
+++ b/arch/mips/loongson/lemote-2f/ec_kb3310b.c
+@@ -79,7 +79,7 @@ int ec_query_seq(unsigned char cmd)
+ 		printk(KERN_ERR "%s: deadable error : timeout...\n", __func__);
+ 		ret = -EINVAL;
+ 	} else
+-		printk(KERN_INFO
+		printk(KERN_DEBUG
+ 			   "(%x/%d)ec issued command %d status : 0x%x\n",
+ 			   timeout, EC_CMD_TIMEOUT - timeout, cmd, status);
+ 
+-- 
+2.5.0
+
--- a/gnu/packages/patches/linux-libre-yeeloong.patch
+++ b/gnu/packages/patches/linux-libre-yeeloong.patch